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Chips and Semiconductors · Unit 3 · Lesson 6 · 晶片與半導體 單元三 第六課

Why Do We Stack Chips Together?先進封裝:為什麼要把晶片疊在一起?

One chip cannot be made as big as we like, so engineers put many chips into one package, side by side or stacked like floors in a building. In 3D, compare chips set apart on a board, side by side on an interposer, and stacked, then take the package apart layer by layer.
一顆晶片沒辦法想做多大就做多大,所以工程師把很多顆晶片放進同一個封裝裡:並排,或像大樓的樓層一樣疊起來。在 3D 裡比較三種放法——分開焊在板子上、並排放在中介層上、疊起來——再把封裝一層一層拆開來看。

Big idea · 一句話看懂

A chip needs a package to protect it and to connect it to the outside. Advanced packaging goes further: it puts several chips into one package, side by side or stacked, and joins them with very short wires. Shorter paths mean data moves faster and uses less power, like turning scattered houses into one tall building.
晶片需要封裝來保護它,並把它和外面接起來。先進封裝更進一步:把好幾顆晶片放進同一個封裝,並排或疊起來,用很短的線連在一起。路短了,資料就跑得更快、更省電,就像把分散的房子蓋成一棟大樓。

3D Model · 3D 模型

Three Ways to Place Chips 三種放晶片的方法

Drag to turn the model, and scroll or pinch to zoom. Choose Apart, Side by side, or Stacked at the top left, and watch the yellow dots of data travel from the blue logic chip to the purple memory chips. Then drag “Take it apart” to pull the layers away from one another and see what a package is made of.
拖曳可以旋轉模型,滾輪或雙指可以縮放。在左上角選「分開放」「並排」或「疊起來」,看黃色的資料小點從藍色的運算晶片跑到紫色的記憶體晶片。再拉「拆開來看」,把每一層上下拉開,看看一個封裝是用什麼做成的。

Drag to turn · 拖曳旋轉 Scroll or pinch to zoom · 滾輪/雙指縮放

This 3D model needs WebGL, which this browser does not support. The reading and the cards below still explain everything.
這個瀏覽器不支援 WebGL,無法顯示 3D 模型;下方的課文與卡片一樣能看懂。

  • Blue: the logic chip, which does the calculating
    藍色:運算晶片,負責計算
  • Purple: memory chips, which hold the data
    紫色:記憶體晶片,負責放資料
  • Gray-blue: the interposer, a slice of silicon with very fine wires
    灰藍色:中介層,一片佈滿細線的矽
  • Green: the package substrate and the circuit board
    綠色:封裝的基板和電路板
  • Yellow dots: data on its way
    黃色小點:正在路上的資料

A teaching diagram, not to scale. The distances (about 3 centimeters, 3 millimeters, and 0.4 millimeters) are example numbers chosen to show the pattern; real products differ. Real packages have thousands of connections where this model shows a few dozen, and real chips are much thinner than they are drawn here.
這是教學用的示意圖,不是真實比例。距離(大約 3 公分、3 公釐、0.4 公釐)是為了呈現趨勢所舉的例子,真的產品各有不同。真的封裝有成千上萬個接點,這裡只畫了幾十個;真的晶片也比圖上薄得多。

Model drawn by My Culture Connect as a teaching diagram. The three layouts follow Wikipedia, “2.5D integrated circuit” and “Three-dimensional integrated circuit”. · 模型由人師教育協會自繪示意;三種放法依維基百科「2.5D integrated circuit」與「Three-dimensional integrated circuit」條目。

Reading · 英文閱讀

6

Unit 6: Why Do We Stack Chips Together?

Look inside a phone or a computer and you will see small black squares on a green board. Those squares are not the chips themselves. Each one is a package: a tough case with a chip inside. The package protects the thin silicon from bumps, dust, and damp. It also connects the chip's tiny contacts to the much bigger world of the circuit board.

打開手機或電腦,你會看到綠色的板子上有一個個黑色的小方塊。那些方塊並不是晶片本身,而是封裝:一個堅固的外殼,晶片在裡面。封裝保護薄薄的矽不被碰撞、灰塵和濕氣傷害,也把晶片上很小的接點,接到電路板那個大得多的世界。

For a long time, that was the whole job. One chip went into one package, and the packages were soldered onto a board a few centimeters apart. But chips kept getting faster, and the trip between them began to matter. Data from the logic chip, which does the thinking, had to cross the board to reach the memory chip, which holds the data. Every trip took time and energy.

很長一段時間,封裝的工作就只有這些。一顆晶片放進一個封裝,一個個封裝焊在板子上,彼此相隔幾公分。可是晶片越來越快,晶片之間的那段路開始變得重要。負責思考的運算晶片送出資料,要穿過板子才到得了負責放資料的記憶體晶片。每走一趟,都要花時間和電。

Why not just make one giant chip with everything on it? Because chips cannot grow without limit. The machine that prints the circuits can only expose an area of about 26 by 33 millimeters at a time. Bigger chips also mean fewer chips on each wafer, and one speck of dust can ruin a bigger piece. So engineers took a different road: keep the chips small, and bring them very close together.

那為什麼不乾脆做一顆很大的晶片,把所有東西都放在上面?因為晶片沒辦法無限制地變大。印電路的機器一次只能曝光大約 26 × 33 公釐的範圍。晶片越大,一片晶圓能做的顆數也越少,而且一粒灰塵就會毀掉更大的一塊。所以工程師走了另一條路:晶片維持小小的,但是讓它們靠得非常近。

The first way is to place bare chips side by side on a thin slice of silicon called an interposer. Its wires are far finer than the wires on a circuit board, so the chips can sit almost touching. This is called 2.5D packaging. Designers can mix and match small chips, called chiplets, a little like building with LEGO bricks.

第一種方法,是把沒有外殼的晶片並排放在一片薄薄的矽上,這片矽叫做中介層。它上面的線比電路板上的細得多,所以晶片幾乎可以貼在一起。這種做法叫做 2.5D 封裝。設計的人可以把叫做「小晶片」(chiplet)的小塊自由搭配,有點像玩樂高積木。

The second way is to stack chips on top of one another, like floors in a building. Tiny copper posts called through-silicon vias, or TSVs, run straight through the chips like elevators. Now the data travels up a few floors instead of across a city. Shorter wires mean faster signals and less wasted power. But a stack traps heat, so engineers must plan carefully how to keep it cool.

第二種方法,是把晶片一顆疊在另一顆上面,像大樓的樓層。叫做矽穿孔(TSV)的細銅柱直直穿過晶片,像電梯一樣。現在資料只要往上走幾層樓,不必橫越整個城市。線短了,訊號更快,浪費的電也更少。不過疊起來容易悶住熱,所以工程師要仔細規劃怎麼散熱。

After packaging, every chip is tested before it leaves the factory. Packaging and testing together are a big industry in Taiwan. ASE, founded in Kaohsiung in 1984, is the world's largest company that packages and tests chips for other companies. So the next time you hear about “advanced packaging,” think of a tall building: many chips, living close together, working as one.

封裝好之後,每一顆晶片都要經過測試才能出廠。封裝和測試合起來(簡稱封測)是台灣很大的產業。1984 年在高雄創立的日月光,是全世界最大的封裝測試代工公司。下次聽到「先進封裝」,就想像一棟高樓:很多顆晶片住得很近,一起工作,像一顆晶片一樣。
Read aloud · 課文朗讀

Questions · 閱讀理解

What two jobs does a chip's package do?

It protects the chip from damage, and it connects the chip's tiny contacts to the circuit board.

Why don't engineers simply make one giant chip?

The machine that prints circuits can only expose about 26 by 33 millimeters at a time, bigger chips mean fewer per wafer, and one speck of dust ruins a bigger piece.

How is stacking chips like a tall building?

The chips are like floors, and the TSVs are like elevators. Data goes up a few floors instead of traveling a long way across a board.

Words & Phrases · 生字及片語

package(n.)封裝;包裝The chip is sealed inside a black package.晶片被封在一個黑色的封裝裡。stack(v., n.)疊;一疊Stack the books neatly on the desk.把書整齊地疊在桌上。connect(v.)連接This cable connects the screen to the computer.這條線把螢幕接到電腦。protect(v.)保護A case protects your phone when it falls.手機掉下去的時候,保護殼會保護它。distance(n.)距離The distance from my home to school is two kilometers.我家到學校的距離是兩公里。vertical(adj.)垂直的An elevator moves in a vertical line.電梯是沿著垂直的線移動。side by side(phr.)並排The two friends sat side by side.兩個朋友並排坐著。test(v., n.)測試Every chip is tested before it is sold.每一顆晶片賣出去之前都要測試。

Quick Check · 小測驗

1. What is the black square you see on a circuit board?

2. What is an interposer?

3. What do TSVs do?

4. Why are shorter wires better?

5. What is one problem with stacking chips?

Build a Package · 組一個封裝

How many chips are in one package? 一個封裝裡有幾顆晶片?

Put logic chips in the middle, add stacks of memory around them, and choose how many chips are in each stack. Count how many chips end up working as one.
把運算晶片放在中間,旁邊加上幾疊記憶體,再選每一疊有幾層。數數看,最後有幾顆晶片像一顆晶片一樣一起工作。

Top view: green is the substrate, gray-blue is the interposer · 俯視圖:綠色是基板,灰藍色是中介層

1 · Logic chips · 運算晶片

3 · Chips in each stack · 每一疊幾層

0 chips in one package一個封裝裡的晶片數

This is a toy layout, not a real product. Stacks of 16 or more chips have been built. A single chip, by comparison, can be at most about 26 × 33 millimeters, the area of one exposure.這是示意的排法,不是哪一個真的產品。現實中已經有疊到 16 層以上的晶片。相比之下,單一顆晶片最大只能大約 26 × 33 公釐,也就是一次曝光的範圍。

Try It in the Model · 在模型裡試試

Four views of a package 封裝的四個樣子

The distances in the panel are examples, but the pattern is real: each step brings the chips closer together.
面板上的距離是舉例,但趨勢是真的:每換一種放法,晶片就靠得更近。

Apart on a board分開放在板子上

Scattered houses · 分散的房子

Three packages, each with one chip. Follow the yellow dots along the gold lines: it is a long way from the logic chip to the memory.
三個封裝,各裝一顆晶片。跟著黃色小點沿著金色的線走:從運算晶片到記憶體要走很遠。

Side by side並排

2.5D · 2.5D 封裝

One package, five chips. They sit on an interposer, so close that the trip is ten times shorter in this model.
一個封裝,五顆晶片。它們放在中介層上,靠得很近,在這個模型裡路程短了十倍。

Stacked疊起來

3D · 3D 封裝

The memory chips become two towers, eight floors each. The gold posts are the elevators.
記憶體晶片變成兩座塔,各有八層樓。金色的柱子就是電梯。

Take it apart拆開來看

Layer by layer · 一層一層

From the bottom: circuit board, solder balls, substrate, tiny bumps, interposer, and the chips on top.
從最下面開始:電路板、錫球、基板、細小的凸塊、中介層,最上面才是晶片。

Packaging by the Numbers · 封裝的數字

Small chips, close together 小小的晶片,靠得很近

Five numbers and names behind advanced packaging.
先進封裝背後的五個數字和名字。

26 × 33millimeters · 公釐

The largest area one exposure can print. A single chip cannot be bigger than this.一次曝光能印的最大範圍。單一顆晶片不能比這更大。

2.5Dside by side · 並排

Bare chips placed next to one another on a silicon interposer, inside one package.把沒有外殼的晶片並排放在矽中介層上,裝在同一個封裝裡。

16+chips in a stack · 層

Three-dimensional chips have been made by stacking as many as 16 or more chips.3D 晶片已經做到把 16 顆以上的晶片疊在一起。

1960sflip chip · 覆晶

IBM began turning chips upside down and joining them with tiny balls of solder instead of wires.IBM 開始把晶片翻過來,用小小的錫球取代金屬線來連接。

1984Kaohsiung · 高雄

ASE opened its first factory. It is now the world's largest packaging and testing company for other firms.日月光的第一座工廠啟用。現在它是全世界最大的封裝測試代工公司。

Packaging Stories · 封裝的故事

An upside-down chip, LEGO bricks, a harbor city, and a long name 一顆翻過來的晶片、樂高積木、一座港都、一個很長的名字

Four stories about putting chips together.
關於「把晶片放在一起」的四個小故事。

1960s · IBM

Flip it over把它翻過來

Early chips were joined to their packages by thin wires around the edges. In the 1960s IBM tried something different for its big computers: put tiny balls of solder on the chip, flip the chip face down, and melt the balls onto the package. This is called a flip chip. It allows many more connections, because the whole face of the chip can be used.
早期的晶片是用邊緣一圈細細的金屬線接到封裝上。1960 年代,IBM 為了它的大型電腦試了不一樣的做法:在晶片上放小小的錫球,把晶片正面朝下翻過來,再把錫球熔接到封裝上。這叫做覆晶。這樣能做出多很多的接點,因為晶片的整個面都可以用。

Chiplets · 小晶片

Building with bricks像積木一樣組合

Instead of one big chip that does everything, designers can make several small chips, each good at one job, and place them side by side on an interposer. These small chips are called chiplets. People often compare them to LEGO bricks, because they can be mixed and matched.
與其做一顆什麼都包的大晶片,設計的人可以做幾顆小晶片,每一顆專門做一件事,再把它們並排放在中介層上。這些小晶片叫做 chiplet。大家常把它們比做樂高積木,因為可以自由搭配。

1984 · 高雄

A harbor city of packages封裝的港都

ASE was founded in 1984 by two brothers, who opened its first factory in Kaohsiung. Today its headquarters and main operations are still there, and it is the world's largest company that packages and tests chips for others. A chip designed in one country and made in Hsinchu or Tainan may well be packaged in Kaohsiung.
日月光在 1984 年由一對兄弟創立,第一座工廠就在高雄。今天它的總部和主要的工廠還是在那裡,也是全世界最大的封裝測試代工公司。一顆在別的國家設計、在新竹或台南製造的晶片,很可能是在高雄封裝的。

CoWoS

Chip on wafer on substrate晶片放在晶圓上、再放在基板上

You may see the word CoWoS in the news. It is TSMC's name for one kind of 2.5D packaging, and it simply describes the layers from top to bottom: Chip on Wafer on Substrate. The “wafer” in the middle is the silicon interposer.
新聞裡常看到 CoWoS 這個字。它是台積電替一種 2.5D 封裝取的名字,意思就是從上到下的三層:晶片(Chip)放在晶圓(Wafer)上,再放在基板(Substrate)上。中間的那片「晶圓」就是矽中介層。

Myth vs. Fact · 常見迷思

Four things people get wrong 四個常見的誤會

✗ Myth · 迷思The black square on the circuit board is the chip.電路板上的黑色方塊就是晶片。

✓ Fact · 事實It is the package. The chip is a thin piece of silicon sealed inside it.那是封裝。晶片是封在裡面的一片薄薄的矽。

✗ Myth · 迷思Packaging is just a box. It does not matter how it is done.封裝只是一個盒子,怎麼做都沒差。

✓ Fact · 事實The package decides how close chips can be and how many connections they have, so it affects speed and power.封裝決定晶片能靠多近、能有多少接點,所以會影響速度和耗電。

✗ Myth · 迷思If we want more power, we can simply make one chip bigger and bigger.想要更強,把一顆晶片越做越大就好了。

✓ Fact · 事實One exposure covers at most about 26 × 33 millimeters, and bigger chips mean fewer good chips from each wafer.一次曝光最大只有大約 26 × 33 公釐;晶片越大,每片晶圓做得出來的好晶片也越少。

✗ Myth · 迷思Stacking is always better than placing chips side by side.疊起來一定比並排好。

✓ Fact · 事實Stacking makes the paths shortest, but it traps heat. Placing chips side by side keeps them cooler. Engineers choose what fits the job.疊起來路最短,但容易悶住熱;並排比較好散熱。工程師會看用途來選。

Remember It · 記憶口訣

Packaging in a sentence 一句話記住封裝

A package protects and connects封裝:保護+連接

It guards the chip and links it to the board.
保護晶片,並把它接到電路板上。

Houses, row houses, tower獨棟、連棟、大樓

Apart on a board, side by side (2.5D), stacked (3D).
分開放在板子上、並排(2.5D)、疊起來(3D)。

TSVs are elevators矽穿孔是電梯

They carry signals straight up through the chips.
它們帶著訊號直直往上穿過晶片。

Shorter is faster and cooler路越短,越快越省電

But a tall stack needs a way to lose its heat.
不過疊得高,就要想辦法把熱散掉。

Safety First · 安全提醒

Before you try anything 動手之前先讀

  • Do not open phones, computers, or chargers to look for chips. They can hold a dangerous charge, and the parts are sharp.不要為了找晶片去拆手機、電腦或充電器。裡面可能還帶著危險的電,零件也很銳利。
  • Old circuit boards from a recycling bin may have sharp edges. Ask an adult to check them first, and wash your hands afterward.回收來的舊電路板邊緣可能很利。先請大人檢查過,摸完要洗手。
  • Small bricks and beads are a choking danger. Keep them away from little children.小積木和珠子可能噎到小小孩,不要讓他們拿到。
  • Pick up string and bricks from the floor when you finish so that nobody trips.活動結束後,把地上的繩子和積木收好,免得有人絆倒。

Classroom Activity 1 · 課堂活動一

Three Cities of Bricks 用積木蓋三座城市

You need · 準備材料

  • Building bricks in two colors (one color for logic, one for memory) and a large baseplate or a sheet of cardboard兩種顏色的積木(一種當運算晶片,一種當記憶體),和一塊大底板或厚紙板
  • String, scissors, and a ruler繩子、剪刀和尺

Steps · 步驟

  1. City 1: put one logic brick and four memory bricks far apart on the board. Use string to connect the logic brick to each memory brick.第一座城市:把一塊運算積木和四塊記憶體積木分開放在底板上,用繩子把運算積木和每一塊記憶體積木連起來。
  2. City 2: place the same five bricks side by side on a small plate. Connect them with string again.第二座城市:把同樣五塊積木並排放在一塊小板子上,再用繩子連一次。
  3. City 3: stack the four memory bricks into a tower beside the logic brick, and connect them.第三座城市:把四塊記憶體積木疊成一座塔,放在運算積木旁邊,再連起來。
  4. Measure all the string you used for each city. Which city needs the least?量一量每座城市用掉的繩子總長。哪一座用得最少?

The string is the wire. Less string means a shorter trip for the data, and less energy spent on the way.
繩子就是電線。繩子越短,資料走的路越短,路上花的電也越少。

Classroom Activity 2 · 課堂活動二

The Message Race 傳話比賽

You need · 準備材料

  • Ten small cards with numbers on them, and a timer十張寫著數字的小卡片,和一個計時器
  • A classroom with space to move一間可以走動的教室

Steps · 步驟

  1. One student is the logic chip, and another is the memory. First they stand at opposite ends of the classroom.一位同學當運算晶片,另一位當記憶體。先讓他們站在教室的兩頭。
  2. The logic chip carries the ten cards to the memory one at a time. Time how long it takes.運算晶片把十張卡片一張一張送到記憶體那裡。計時看要花多久。
  3. Now they stand side by side and do it again. Then try it with the memory sitting right in front of the logic chip.現在讓他們並排站,再做一次。接著讓記憶體就坐在運算晶片的正前方,再試一次。
  4. Compare the three times. Who got tired? What does that tell you about power?比較三次的時間。誰累了?這和「耗電」有什麼關係?

Walk, do not run. The point is the distance, not the speed of the runner.
用走的,不要跑。重點是距離,不是跑的人有多快。

Sources · 資料出處

Facts and numbers on this page were checked against these sources (October 2026). · 本頁的事實與數字依下列資料查證(2026 年 10 月)。

  1. Packaging is the final stage of making a chip: the die is put in a case that prevents damage and corrosion and connects it to the circuit board; packaging is followed by testing封裝是製造晶片的最後階段:把晶粒放進能防止損傷與腐蝕的外殼,並連接到電路板;封裝之後進行測試Wikipedia, “Integrated circuit packaging” ↗
  2. 2.5D: several dies side by side on a silicon interposer in one package; placing dies side by side reduces heat buildup; chiplets combined LEGO-style; TSMC's CoWoS (Chip-on-Wafer-on-Substrate)2.5D:多顆晶粒並排放在矽中介層上、裝在同一個封裝;並排可減少積熱;小晶片像樂高一樣組合;台積電的 CoWoSWikipedia, “2.5D integrated circuit” ↗
  3. 3D: stacking as many as 16 or more chips, connected vertically with through-silicon vias; shorter wires, less power3D:把 16 顆以上的晶片疊起來,用矽穿孔上下連接;線更短、更省電Wikipedia, “Three-dimensional integrated circuit” ↗
  4. A through-silicon via is a vertical electrical connection that passes completely through a silicon wafer or die矽穿孔是完全穿過矽晶圓或晶粒的垂直電氣連接Wikipedia, “Through-silicon via” ↗
  5. An interposer spreads or reroutes connections; it can be made of silicon or organic material中介層用來把接點展開或重新佈線;可以用矽或有機材料製作Wikipedia, “Interposer” ↗
  6. Flip chip: solder bumps on the chip, which is flipped face down; introduced commercially by IBM in the 1960s覆晶:在晶片上做錫球凸塊,再把晶片正面朝下翻過來;1960 年代由 IBM 商業化Wikipedia, “Flip chip” ↗
  7. The EUV exposure field is 26 × 33 mmEUV 一次曝光的範圍是 26 × 33 公釐Wikipedia, “Extreme ultraviolet lithography” ↗
  8. ASE: founded in 1984 with its first factory in Kaohsiung; headquarters in Kaohsiung; the largest outsourced assembly and test (OSAT) provider according to Gartner日月光:1984 年創立,第一座工廠在高雄;總部在高雄;依 Gartner 是最大的封裝測試代工(OSAT)業者Wikipedia, “ASE Group” ↗